World’s First 64-Layer 3D NAND BiCS3 Unveiled by WD, Initial Output by Q4 2016
Western Digital Corp. has successfully developed the next generation of its 3D NAND technology called BiCS3, based on 64 layers of vertical storage capacity. WD is expected to sample initial output by the end of this year with commercial volumes to ship in the first half of 2017.
For reference, Samsung currently develops 48-layer V-NAND with 256-Gbit die density for both TLC and MLC. Intel/Micron has 32-layer TLC NAND with 384-Gbit density and 32-layer MLC with 256-Gbit density, and SK Hynix produces 36-layer 3D NAND V2 with 128Gbit die density.
WD’s latest 64-layer NAND brings a significant upgrade over the currently highest 48-layer NAND by Samsung. The BiCS3 uses 3-bits-per-cell technology which is developed thanks to manufacturing partnership with Toshiba as well as the acquisition of SanDisk late last year.
According to WD, BiCS3 will bring notable improvement in high aspect ratio semiconductor processing that would deliver exceptional high capacity performance at a quite reasonable price.
BiCS3 will feature the use of 3-bits-per-cell technology along with advances in high aspect ratio semiconductor processing to deliver higher capacity, superior performance and reliability at an attractive cost. Together with BiCS2, our 3D NAND portfolio has broadened significantly, enhancing our ability to address a full spectrum of customer applications in retail, mobile and data center.
The 64-layer design of BiCS3 will be available in 256-Gbit capacity however, WD plans on releasing NAND in a range of capacities up to 512-Gbit on a single chip later on. Pilot production of BiCS3 has begun at WD and Toshiba’s new facility at Yokkaichi, Japan with samples expected sometime this quarter.
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