Nvidia Pascal GP100 GPU is a Real Monster With 12 TFLOPS SP and 4 TFLOPS DP
New details about Nvidia’s flagship GP100, aka Big Pascal, have surfaced which suggest that the graphics chip will have at least 12 TFLOPS single precision and 4 TFLOPS double precision performance at memory bandwidth of 1024 GB / sec.
The information comes from a CUDA Fellow Manuel Ujaldon, a Spanish university professor with his own profile on Nvidia’s official website. The presentation slide shows a comparison of single- and double-precision performance and the bandwidth between Fermi, Kepler, Pascal and some competing platforms from AMD and Intel.
The DP / SP ratio of 1:3 points towards the use of dedicated FP64 units to perform the double-precision operations. To achieve the afore-mentioned 12 TFLOPS, it would take otherwise 6,144 shader units at a clock speed of almost 1,000 MHz or 5,120 shader units at 1,175 MHz.
The first case is virtually a smooth doubling of what the GM200 chip has to offer (3072 shader units), but at the shoulders of the 16-nm FinFET manufacturing process. However, given the lower yield accompanied by higher manufacturing costs, the 5,120-shader version for starters seems more realistic to us.
Oddly, the presentation addressed Hybrid Memory Cubes, or HMCs, as the memory technology, rather than the recently talked about High Memory Bandwidth (HBM). So there’s possibility that the flagship GP100 is launched as a pure HPC graphics chip based on Nvidia architecture, in which the optimal latency HMCs are used. Though we currently don’t have any concrete evidence to prove it.
Spec-wise, the GP100 GPU will feature four 4-Hi HBM2 stacks to achieve 16 GB of VRAM in total, and 8-Hi stacks to reach up to 32 GB for the professional compute SKUs. It includes nearly 17 billion transistors in a relatively smaller packing, offering up to twice the performance per watt improvement over the predessor Maxwell.
Nvidia is expected to unveil the Titan grade products based on the Pascal GP100 in April at their GPU Technology Conference.