Intel’s ‘Knight’s Landing’ Xeon Phi Chip Will Boost Supercomputing Sector
Intel has unveiled a new version of Xeon Phi, known as Knight’s Landing, which is a 72-core coprocessor solution manufactured on a 14nm process with 3D Tri-Gate transistors.
These pre-production chips aren’t your typical CPUs though; they built around Intel’s Many Integrated Core, or MIC, architecture which itself is part of a larger PCI-E add-in card solution for supercomputing applications. The chip is part of the company’s efforts to boost their Scalable System Framework (SFF) for the high performance computing (HPC) segment.
“We’re entering a new era in which supercomputing is being transformed from a tool for a specific problem to a general tool for many,” said Charlie Wuischpard, vice president and general manager of HPC Platform Group at Intel. “System-level innovations in processing, memory, software and fabric technologies are enabling system capabilities to be designed and optimized for different usages, from traditional HPC to the emerging world of big data analytics and everything in between.”
The company believes the Intel Scalable System Framework will act as the stepping stone for designing and delivering the next generation of systems for the “HPC everywhere” era.
The current version of Xeon Phi, codenamed Knight’s Corner, has up to 61 cores. The new Knight’s Landing chip ups the ante as it exceeds 3 teraflops and over 8 teraflops of single-precision delivering nearly double the precision performance.
In addition, it packs 16GB of on-package MCDRAM memory, which Intel claims is five times more power efficient as GDDR5 and three times as dense.
With all these improvements, Knight’s Landing is apparently suitable for a wide range of supercomputing tasks, including climate change simulations, genetic analysis, investment portfolio risk management, and many others.